1. Field of the Invention
The present invention relates to capacitors for pixel display circuits and, more particularly, to a novel storage capacitor and method of fabrication for providing a capacitive device having reduced crosstalk and lower loss of charge.
2. Description of the Related Art
Thin film transistors (TFTs) are particularly useful in liquid crystal displays (LCDs) for active matrix display devices. TFT-LCD devices have the advantage of low power consumption.
Referring to FIGS. 1 and 2, a TFT matrix display cell 2 includes a pixel region 6 and a storage capacitor region 8. A gate metal layer 10 is disposed on a substrate 12. An amorphous silicon (a-Si:H) layer 15 is formed on a gate insulating film 13 followed by a dielectric layer 14, generally silicon nitride (SiNx), and an N+ doped a-Si layer 16. Metal lines 18 contact layer 16 and are disposed along the sides of a pixel region 6. A data metal layer 26 and N+ doped a-Si layer 16 are deposited on a portion of dielectric layer 14 and a portion of a-Si:H layer 15. Data metal layer 26 is covered by a passivation film 28.
A transparent electrode 30 is deposited over pixel region 6 and provides a connection to a source electrode through a window in passivation film 28. Transparent electrode 30 typically includes indium-tin oxide (ITO).
A storage capacitance electrode (Cs) is placed in storage capacitor region 8. Since TFTs access to storage capacitor Cs are formed simultaneously with Cs, gate metal layer 10 is used to form a first capacitor electrode (gate metal 10) as well as gate electrodes for TFTs. Similarly, gate insulating layer 13, which insulates gates of the TFTs, is formed on the first capacitor electrode and functions as a capacitor dielectric material between gate metal layer 10 and data metal layer 26. Data metal 26 functions as a counter electrode to the storage capacitor's first electrode (gate metal 10).
The first electrode and the counter electrode form a storage capacitance unit. The storage capacitance unit's purpose is to maintain voltage at the pixel electrode within specified limits for a predetermined amount of time after the TFT has been turned off. The storage capacitor may have difficulty in maintaining pixel voltage due to current leaks.
Further, with decreasing sizes of pixels with each active matrix display design generation makes it increasingly more difficult to provide sufficient capacitance. As a result, affected pixels tend to "turn on" when written "off" and thereby degrade image quality.
Referring to FIGS. 3 and 4, a pixel cell 50 is shown and a method for driving pixel 50 is described. Pixel cell 50 includes data lines M and M+1 and gate lines N and N+1 used for activating a pixel 52. A TFT is activated by gate line N and conducts between data line M and pixel 52. A storage capacitor Cs is included as described above. Other capacitors are included, such as, a gate source channel overlap capacitor, C.sub.GS, and a liquid crystal capacitance C.sub.LC which also prevent charge leaks from pixel 52. C.sub.LC is the capacitance between pixel electrode 30 and a common electrode on the inside of a color filter.
A driving method for activating pixel cell 52 includes placing a voltage level corresponding to a desired grey value on data line M. Gate line N+1 is held low to turn off a TFT of the previous line and provides a firm voltage potential to the first capacitor electrode (gate metal 10 in FIG. 2)) of storage capacitor Cs. Gate line N is then held high. This turns on the TFT of cell 50. Charge is transferred from data line M to pixel 52 and storage capacitor Cs until pixel 52 reaches the same voltage as data line M. The voltage level defines the grey value by determining how much of a liquid crystal of pixel 52 gets rotated between polarizers (not shown) and therefore determines the optical transmission through cell 50. Cs keeps voltage drop due to leakage currents in cell 50 during not-addressed time during one frame within specified limits and also to keep capacitive coupling (e.g., crosstalk) within specified limits. It is desirable to have a large Cs to improve image quality, but this reduces the area of the pixel electrode, 30, and hence the aperture ratio (fraction of area through which light is transmitted). A balance must be achieved between a high aperture ratio and Cs size.
Therefore, a need exists for a storage capacitor for active matrix displays providing increased capacitive area while reducing current leakage and crosstalk without reducing the aperture ratio. A further need exists for a larger storage capacitor that provides reduced crosstalk by decreasing the ratio of parasitic capacitances to storage capacitance.